Microprocessors are frequently required to perform mathematical operations using floating-point numbers. Often, a specialized hardware circuit (i.e., a floating-point unit) is included in the microprocessor (or electrically coupled to the microprocessor) to perform these floating-point multiply-add operations. By using a floating-point unit, floating-point multiply-add operations may be performed faster than if they were performed in software, and the software execution unit of the microprocessor is free to execute other operations.
However, when floating-point numbers are used in mathematical operations, the result of the operation may be too large or too small to be represented by the floating-point unit. When the result is too large to be represented by the floating-point unit, an ‘overflow’ condition occurs. When the result is too small to be represented by the floating-point unit, an ‘underflow’ condition occurs. In either case (overflow or underflow), a software routine must be executed to perform the operation if accurate results are required. In such an instance, the system is burdened by the overhead of both the execution time of the floating-point unit and the execution time of the software routine even though only a single floating-point multiply-add operation is performed.